1. Field of the Invention
Embodiments of the present invention relate to a flash memory device and a fabricating method thereof suitable for solving the problem of reduced reliability of highly-integrated devices, among other things.
2. Discussion of the Related Art
Recently, demand is rising for nonvolatile memory (NVM) devices (flash memory devices), which do not require periodic memory refreshes and are capable of electrical programming (i.e., writing data to a memory cell) and erasing (i.e., removing data written to a memory cell).
Generally, flash memory devices can be categorized into two types. A NAND type flash memory device includes a plurality of serially connected memory cells (i.e., drain or source is shared by adjacent cells) to configure a single string. A NOR type flash memory device includes a plurality of memory cells connected in parallel with each other.
Unlike the NOR type flash memory device, the NAND type flash memory device has a characteristic of reading information sequentially and a characteristic of performing programming and erasing by controlling a threshold voltage (Vt) of a memory cell. Controlling Vt may be achieved by injecting/discharging electrons into/from a floating gate by Fowler-Nordheim (F-N) tunneling.
Many efforts are made to research and develop high-integration technology to implement a large-size memory device capable of storing more data. High integration of a flash memory device introduces a problem of RC (resistive capacitive) delay, which is caused by resistance and parasitic capacitance. To address such problems, a low-resistance wire such as a Cu wire may be adopted and a low-k substance having a dielectric constant of 3.0 or below may be used as a dielectric.
However, the use of a low dielectric substance degrades device reliability because the surface characteristics of a low dielectric substance typically cause it to adhere poorly to metal.
FIG. 1A shows a wire pulling test. Referring to FIG. 1A, wire bonding is performed to connect a pad 10 of a device to a lead frame 20 with a wire 30. A wire pulling test is then performed to measure an amount of force required to cut or break the wire 30 by applying a force to the wire 30 in a direction (A).
FIGS. 1B to 1E show peeling phenomena. FIGS. 1B to 1E are optical microscope images of a part having a peeling phenomenon in a flash memory device and cross-sectional images by FIB (focused ion beam) and SEM (scanning electron microscope).
If a lower structure of a flash memory device is vulnerable, when the wire 30 is bonded to the pad 10, peeling phenomena occur, as shown in FIGS. 1B to 1E. Consequently, the wire 30 has a weak bond with the pad 10. Thus, if the peeling phenomenon occurs, packaging becomes impossible and the flash memory device becomes unusable.